MultiCam 6.19
- Windows Core Isolation 보안 기능 지원
- Windows 11 지원
- 최신 Linux 배포판 및 커널 지원
- MultiCam을 위한 새로운 Python 바인딩
Base 구성 Camera Link 카메라 2대용 프레임 그래버
© EURESYS S.A. - Subject to change without notice
8/14/2024 Datasheet Base 구성 Camera Link 카메라 2대용 프레임 그래버
Main benefitsOther benefits사양Mechanical
Host bus
Camera / video inputs
Area-scan camera control
Line-scan camera control
On-board processing
General Purpose Inputs and Outputs
Software
Environmental conditions
Certifications
Ordering Information
Offices
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Camera Link는 여러 개의 저전압 차동 신호(LVDS) 쌍과 하나 또는 두 개의 26핀 Miniature Delta Ribbon(MDR-26) 또는 SDR-26 커넥터를 사용하는 지점 간 반병렬/반직렬 데이터 인터페이스입니다. 하나의 커넥터/케이블로 2Gbps의 대역폭을 제공하는 Camera Link Base부터 두 개의 커넥터/케이블로 6.8Gbps(초당 850Mbyte)의 대역폭을 제공하는 Camera Link 80비트(Deca)까지 다양한 카메라 링크 구성이 가능합니다. 이미지 전송 외에도 4개의 카메라 제어 신호를 통해 지연 시간 없이 카메라를 직접 제어할 수 있습니다.
PCI Express card
Standard profile, half length, 4-lane PCI Express card
Air-cooling, fanless
For insertion in a standard height, 4-lane or higher, PCI Express card slot
'A' on bracket:
26-position Shrunk Delta Ribbon (SDR) socket
Camera Link Camera A
'B' on bracket:
26-position Shrunk Delta Ribbon (SDR) socket
Camera Link Camera B
'EXTERNAL I/O' on bracket:
26-pin 3-row high-density female sub-D connector
I/O lines and power output
'INTERNAL I/O A on PCB:
26-pin 2-row 0.1" pitch pin header with shrouding
I/O lines of camera A and power output
'INTERNAL I/O B on PCB:
26-pin 2-row 0.1" pitch pin header with shrouding
I/O lines of camera B and power output
'POWER INPUT' on module:
4-pin MOLEX power socket
12 VDC power input for PoCL cameras and I/O power
PCB L X H: 167.65 mm x 111.15 mm, 6.6 in x 4.38 in
Net weight: 142 g [5 oz]
Gross weight: 242 g [8.5 oz]
PCI Express 1.0
4 lanes
2.5 GT/s (PCIe 1.0)
1024 bytes
32- and 64-bit
1,024 MB/s
Up to 833 MB/s for a PCI Express payload size of 256 bytes and 64-bit addressing
Up to 844 MB/s for a PCI Express payload size of 256 bytes and 32-bit addressing
Up to 754 MB/s for a PCI Express payload size of 128 bytes and 64-bit addressing
Up to 780 MB/s for a PCI Express payload size of 128 bytes and 32-bit addressing
Max.7.2 W; Typ. 6.0 W (0.47 A @ 3.3V;0.37 A @+12V)
Camera Link
Camera Link 2.0
85 MHz
24-bit (BASE)
PoCL
Two Shrunk Delta Ribbon (SDR) Miniature Camera Link (MiniCL)
ECCO
Two Base or Lite cameras
2
Yes
4.08 Gbps (510 MB/s)
Base or Lite
From 20 MHz up to 85 MHz
Two independent PoCL SafePower compliant controllers with overload, over-voltage and short-circuit protection
Grayscale and color (RGB and Bayer) area- and line-scan cameras
Precise control of asynchronous reset cameras, with exposure control.
Support of camera exposure/readout overlap.
Support of external hardware trigger, with optional delay and trigger decimation.
Accurate control of the strobe position for strobed light sources.
Support of early and late strobe pulses.
Precise control of start-of-scan and end-of-scan triggers.
Support of external hardware trigger, with optional delay.
Support of infinite acquisition, without missing line, for web inspection applications.
Support for quadrature motion encoders, with programmable noise filters, selection of acquisition direction and backward motion compensation.
Rate Converter tool for fine control of the pixel aspect ratio.
Rate Divider tool
Accurate control of the strobe position for strobed light sources.
128 MB (64 MB for image data)
Unpacking of 10-/12-/14-bit to 16-bit with selectable justification to LSb or MSb
Monochrome: 8-bit, 10-bit or 12-bit per pixel, up to 500 MPixel/s per camera
RGB: 3x8-bit per pixel, up to 125 MPixel/s per camera
Advanced interpolation method using average and median functions on a 3x3 kernel
Up to 125 MPixel/s per camera
2 sets of 10 I/O lines, each set including:
2 differential inputs (DIN)
4 isolated inputs (IIN)
4 isolated outputs (IOUT)
Each acquisition channel has a dedicated set of 10 I/O's
The I/O set of INTERNAL IO CONNECTOR A is dedicated to the acquisition channel of CAMERA A
The I/O set of INTERNAL IO CONNECTOR B is dedicated to the acquisition channel of CAMERA B
The input lines of an I/O set can be used by the corresponding acquisition channel as:
Camera frame trigger source (area-scan only)
Acquisition sequence trigger source (area-scan only)
Camera line trigger source (line-scan only)
Page acquisition trigger source (line-scan only)
Page acquisition end trigger source (line-scan only)
(Quadrature) motion encoder input (line-scan only)
The IOUT 1 output line of an I/O set can be used by the corresponding acquisition channel, as:
Illumination strobe output
All the input lines can be used as general purpose inputs
All the output lines can be used as general purpose outputs
DIN: High-speed differential inputs, up to 5 MHz, compatible with ANSI/EIA/TIA-422/485 differential line drivers and complementary TTL drivers
IIN: Isolated current-sense inputs with wide voltage input range up to 30V, compatible with totem-pole LVTTL, TTL, 5V CMOS drivers, RS-422 differential line drivers, potential free contacts, solid-state relays and opto-couplers
IOUT: Isolated contact outputs compatible with 30V / 100mA loads
NOTE: IIN and IOUT lines provide a functional isolation grade for the circuit technical protection. It does not provide an isolation that can protect a human being from electrical shock!
Glitch removal filter available only on input lines used as trigger sources
Configurable with five time constants:
100 ns, 500 ns, and 2.5 µs for trigger / page trigger / page end trigger sources
40 ns, 100 ns, 200 ns, 500 ns, 1 µs, 5 µs, 10 µs for line trigger sources
Non-isolated, +5V, 1A and +12V, 1A, with electronic fuse protection
Microsoft Windows 10, 8.1, 7 for x86 (32-bit) and x86-64 (64-bit) processor architectures
Linux for x86 (32-bit) and x86-64 (64-bit) processor architectures
Refer to release notes for details
MultiCam 32- and 64-bit binary libraries (Windows and Linux), for ISO-compliant C/C++ compilers
Yes
0 °C to +50 °C / +32 °F to +122 °F
10% to 90% RH non-condensing
-20 °C to +70 °C/ -4 °F to +158 °F
10% to 90% RH non-condensing
European Council EMC Directive 2014/30/EU
United States FCC rule 47 CFR 15
EN 55022:2010 / CISPR 22:2008 Class B
EN 55032:2015 / CISPR 32:2012 Class B
FCC 47 Part 15 Class B
EN 55024:2010 / CISPR 24:2010
EN 55035:2017 / CISPR 35:2016
EN 61000-4-2:2009
EN 61000-4-3:2006
EN 61000-4-4:2004
EN 61000-4-5:2014
EN 61000-4-6:2014
Korean Radio Waves Act, Article 58-2, Clause 3
PCB compliant with UL 94 V-0
European Union Directive 2015/863 (ROHS3)
European Union Regulation 1907/2006
Must be disposed of separately from normal household waste and must be recycled according to local regulations
PC1623 Grablink DualBase
PC1625 DB25F I/O Adapter Cable
PC3304 HD26F I/O Adapter Cable