MVDK

• 2x 10/100/1000 Ethernet (PS based and PL based) (the latter is used for GigE Vision)
• USB 3.0, implemented with PTN36241BBS driver
• USB 2.0 OTG
• USB Serial
• 4 User LEDs
• 4 User Push-Buttons
• 12 Test Pins
• 1 or 2 FMC connectors to connect camera modules or additional interface modules
• HDMI Output, implemented with ADI ADV7511

• Altera Cyclone V ARM Processor-based SoC FPGA
• 1 GByte DDR3L SDRAM
• 64 MB quad SPI Flash
• 10/100/1000 Ethernet PHY
• Five 3.125 Gb/s transceivers

The MVDK delivered for GigE Vision development supports the design of camera and host applications compliant with the AIA GigE Vision specification with a speed of up to 10 Gbit/s. 2.5, 5 and 10 Gbit/s applications require an S2I NBase-T FMC module.

S2I’s MVDK (Machine Vision Development Kit) is a hardware platform that eases the evaluation and development of products based on S2I’s IP Cores and using any major industrial vision interface. The MVDK base board is highly configurable through the use of FMCs (FPGA Mezzanine Cards). It provides an interface to vision sensors and enables the development of GigE Vision, USB3 Vision and CoaXPress cameras (devices), as well as the design of GigE Vision and CoaXPress hosts.

• Xilinx Zynq-7000-series SoC FPGA 7015
• 1 GB DDR3 SDRAM
• 512 MB NAND Flash
• 64 MB quad SPI Flash
• 10/100/1000 Ethernet PHY
• Four 6.25 Gb/s transceivers

The MVDK delivered for CoaXPress development includes an FMC with two or four CXP-6 or CXP-12 links for device (camera) or host (frame grabber) design. The device and host reference designs are fully CoaXPress compliant and certified by the JIIA. (http://jiia.org/en/cxp/camera005/).

S2I’s MVDK is compliant with Sony’s IMX Pregius series of sensors, a widely used, high-quality CMOS series of imagers. S2I supports these sensors with dedicated IP to read data from and control the sensors. The reference design consists of the IMX IP Core together with a GigE Vision compliant output.

The MVDK is delivered with an Enclustra Mercury FPGA module and an FMC interface board . They come along with a reference design for the selected transport layer interfaces. Together, they minimize development time and allow for top-notch performance at a small footprint, while leaving enough flexibility to customize the design.

• Xilinx Zynq Ultrascale+ MPSoC XCZU6
• 2 GB DDR4 ECC SDRAM
• 64 MB quad SPI Flash
• 16 GB eMMC Flash
• 10/100/1000 Ethernet PHY
• 8+3 16 Gb/s transceivers (using both FMC connectors)

The MVDK available for USB3 Vision development is based on the 5-Gbit/s technology of standard USB3 components and allows for the most cost-effective high-speed camera design today. The USB3 Vision IP Core development kit is fully compliant with Genicam and certified by the AIA. This is the easiest way to start the design of a new USB3 Vision camera. The USB3 Vision interface is implemented using an FMC designed by S2I that uses a Cypress FX3 USB3 chip.